Vacancy Description
Sr Staff /Staff Engineer, RTL Design
Job Description
+ Collaborate with **system architects and micro-architects** to define high-level, implementable SoC specifications.
+ Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning.
+ Lead RTL design and integration of **multi-subsystem SoCs** , supporting complex architectures with **multi-core, multi-power, and multi-reset domains** .
+ Demonstrate strong proficiency with **front-end flows** , including **Lint, CDC, low-power (UPF) checks, synthesis, DFT** , and **Static Timing Analysis (STA)** .
+ Drive the development of robust **Safety, Security, and Debug architectures** for advanced SoCs with multiple interconnects.
+ Design and integrate **standard interface protocols** such as **AHB, AXI, CHI** , and memory interfaces including **ROM, RAM, F...
Job Description
+ Collaborate with **system architects and micro-architects** to define high-level, implementable SoC specifications.
+ Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning.
+ Lead RTL design and integration of **multi-subsystem SoCs** , supporting complex architectures with **multi-core, multi-power, and multi-reset domains** .
+ Demonstrate strong proficiency with **front-end flows** , including **Lint, CDC, low-power (UPF) checks, synthesis, DFT** , and **Static Timing Analysis (STA)** .
+ Drive the development of robust **Safety, Security, and Debug architectures** for advanced SoCs with multiple interconnects.
+ Design and integrate **standard interface protocols** such as **AHB, AXI, CHI** , and memory interfaces including **ROM, RAM, F...
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