Vacancy Description
Responsibilities
- Architecture Design: Participate in defining the architecture of SoC top or subsystems (NoC/CPU/NPU/ISP/Codec), and conduct PPA (Power, Performance, Area) evaluation during the early design phase.
- RTL Implementation: Write high-quality, well-structured RTL code (Verilog/SystemVerilog) and maintain related design documentation.
- Front-End Quality Control: Perform Lint, CDC (Clock Domain Crossing), and RDC (Reset Domain Crossing) checks to ensure code standard compliance and design robustness.
- Cross-Functional Collaboration: Work closely with the Verification team for debugging and achieving Coverage closure; collaborate with the Backend/Mid-end teams to support Synthesis, SDC (Synopsys Design Constraints) generation, STA (Static Timing Analysis), and power optimization.
- Low Power Design: Participate in the formulation of chip low-power strategies, proficiently apply Clock Gating and Power Gating techniques, and sup...
Ready to Apply?
अभी आवेदन करें
Submit your application for SoC Digital Design Engineer, Multimedia Lab Singapore Regular at ByteDance
Apply for this Position