Silicon Engineering Manager, Design and Verification

Silicon Engineering Manager, Design and Verification

_corporate_fare_ Google _place_ Mountain View, CA, USA

**Advanced**

Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 10 years of experience in ASIC design verification methodology.
+ 4 years of experience in leading/managing IP/Subsystem verification teams.
+ Experience in UVM based IP and Subsystem/SoC verification.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ Experience in PSS (Portable Test and Stimulus Standard), formal or emulation based SimXL (Simulation Acceleration) methodologies.