Senior Verification Engineer – Drive Quality In Next‑gen Risc‑v Cpus (Uvm/Systemverilog)

Senior Verification Engineer – Drive Quality in Next‑Gen RISC‑V CPUs (UVM/System Verilog) Overview At Akuaro, we are proudly leading the recruitment process for our partner — a European deep-tech company redefining what’s possible in high-performance computing and digital infrastructure. Specialized in cutting-edge RISC-V systems and backed by major innovation initiatives, our partner is assembling a world-class engineering team in Barcelona. They are now seeking a Senior Verification Engineer with expertise in System Verilog and UVM to ensure their next generation of high-performance silicon meets the highest quality standards. Contract: Permanent – Internal team of our partner Why This Role Is Unique Join the forefront of Europe’s semiconductor revolution in CPU design and verification. Verify cutting-edge RISC-V processors destined for high-performance computing applications. Use the latest advanced verification methodologies (UVM, formal verification) on complex, modern microarchit...