Senior Full-Chip Timing & Modeling Engineer (FPGA/SoC)

754 Altera Semiconductor Technology (M) Sdn. Bhd. seeks a Full Chip Engineer in Penang, Malaysia. You will be responsible for developing timing methodologies and performing full-chip timing analysis, collaborating with teams on design and troubleshooting.

The ideal candidate has a BS/MS in Electrical or Computer Engineering and over 5 years of experience. Proficiency in timing formats and scripting in Python and Tcl is essential.