Vacancy Description
📍 Location: Bay Area, California (Onsite at Client Location)
🏢 Work Mode: Full-Time | Work From Office (WFO)
🛂 Work Authorization: Valid US Work Visa Required
About the Role
We are looking for an experienced Senior Design Engineer with strong expertise in SoC architecture, RTL development, and high-performance interconnects. The ideal candidate will play a key role in designing next-generation semiconductor solutions for cutting-edge compute and connectivity platforms.
Experience
✅ 8–12 Years of Industry Experience
Key Responsibilities
RTL Design & Development
Design and develop synthesizable RTL for:
- AMBA AXI4 / AXI5 Interconnects
- AMBA ACE & CHI Coherent Interfaces
- DMA Engines
- Protocol Bridges & Converters
- Buffering Structures
- Memory Subsystems interfacing with LPDDR4 / LPDDR5 / LPDDR5X Controllers
- PCIe ...
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