Senior ASIC Verification Engineer at Synopsys

Boost innovation at Synopsys as a Senior ASIC Verification Engineer specializing in PCIe PHY. Drive next-gen silicon solutions using your expertise in digital verification methodologies to enhance quality and efficiency.
As a Senior ASIC Verification Engineer, you will focus on PCIe PHY IP verification. Your deep knowledge of mixed-signal IP products is crucial while working collaboratively with design and architecture teams. You'll define verification strategies aimed at improving performance and power management in silicon solutions.
Key Responsibilities:
• Define verification strategy for PCIe PHY IPs
• Develop comprehensive verification plans for digital designs
• Architect advanced testbench environments for verification
• Collaborate across teams to ensure robust cross-functional coverage
• Drive resolution of complex verification issues
Requirements:
• Extensive experience in mixed-signal ASIC/IP verification
• Solid knowledge of PCIe and mixed-sign...