At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Key Responsibilities
Design and develop system-level AVIP solutions for emulation/prototyping platforms (Palladium, Protium)Build and integrate Accelerated Verification IP environments for complex SoC and subsystem validationDevelop end-to-end verification flows including:AVIP integrationTestbench and system modelingBare-metal / driver-level validationArchitect scalable solutions for multi-protocol system validation across multiple clock domainsOptimize solutions for performance, scalability, and emulation efficiencyDevelop custom test cases, tools, and automation to enable advanced use models (embedded / co-emulation / hybrid flows)Work closely with cross-functional teams (PE, AE, customers) to debug and resolve system-level issuesContribute to next-generation AVIP method...