Principal Engineer, ASIC Development Engineering (STA and Sign-Off)

Position Overview:

We are seeking a highly skilled and experienced Principal Engineer for our Static Timing Analysis (STA) function. The successful candidate will be part to a  team of talented engineers responsible for ensuring the timing performance and integrity of our complex semiconductor designs. This role requires a deep understanding of STA methodologies, leadership skills, and a strategic vision to drive continuous improvement in our timing analysis processes.

Key Responsibilities:

- Own complete STA  signoff for ASIC, providing direction and guidance to PnR team for Timing closure & Synthesis report analysis.

- Work with IP & Design team for Timing constraints Development & Review activities.

- Develop and implement advanced STA methodologies and strategies to meet the timing closure requirements of complex IC designs.

- Collaborate with cross-functional teams, including...