Vacancy Description
A leading technology firm in Singapore is seeking an experienced Digital Design Engineer to implement ISP algorithms and oversee the design architecture. You will lead and mentor a team of RTL design engineers, collaborating closely with various teams. Required qualifications include an MSEE or BSEE and over 7 years of experience in digital design. Expertise in System Verilog and project management is essential. This role presents an excellent opportunity to shape innovative designs in a dynamic environment.
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