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IP Design Engineer (RTL - Synthesis)

Silicon One

bayan lepas, penang, Malaysia Full-time May 29, 2026
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Vacancy Description

Silicon One is seeking a high-caliber IP Design Engineer to join our team. In this role, you will be involved in the full development lifecycle—from architecture definition to RTL implementation—shaping world-class FPGA IP solutions for our next-generation networking products.

Location: Bayan Lepas, Penang, Malaysia

Job Type: Full-time (On-site)

Key Responsibilities

  • Architecture & Protocol Research: Deeply understand company FPGA device architectures, application scenarios, classic algorithms, and protocol specifications.
  • End-to-End IP Development: Analyze market requirements to define architectures and design algorithm models (C/C++, Matlab, etc.). Write RTL code (Verilog/VHDL), create reference designs, and develop verification environments (SystemVerilog).
  • IP Packaging & Delivery: Utilize EDA tools and scripts to package IPs, including the development of IP GUIs and comprehensive IP package te...

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