Hardware Description Language (HDL) Developer

Job Title - RTL Design Engineers Exp Level: 4+ yrs Loctaion: Hyderabad /Bangalore Job Description:
- RTL coding knowledge
- Top-level (SOC) level basic industry standard Arch knowledge
- SoC & IP level Integration knowledge
- IPXACT knowledge
- IORING and Phys & GPIOs basic functionality
- Design Partitioning(Tilification) knowledge
- Design RTL quality checks: Clock domain crossing(CDC) Reset domain crossing(RDC) LINT VSI UPF knowledge LEC(Logic equivalence check) Timing concepts & SDC knowledge
- Tools knowledge: Vc_static or equivalent other tools(VSI) VC_spyglass LINT, CDC and RDC 0in Formality and conformal LEC tool
- Design and scripting languages: Verilog and SV Perl Python TCL Interested can share CV to