Vacancy Description
• Strong background in logic verification with a good understanding of logic design concepts
• Expertise in Verilog System Verilog AVM OVM Perl scripting, and VCS simulator
• Familiarity with the ASIC design flow and working knowledge of 3D Graphics.
• Working knowledge of UNIX and Windows
• Expertise in Verilog System Verilog AVM OVM Perl scripting, and VCS simulator
• Familiarity with the ASIC design flow and working knowledge of 3D Graphics.
• Working knowledge of UNIX and Windows
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