Design Verification Engineer

Responsibilities

• Performs functional logic verification of an FPGA to ensure the design meets specification requirements.
• Develops FPGA verification plans, test benches, and the verification environment to ensure coverage that confirms to microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the pre‑silicon environment.
• Finds and implements corrective measures to resolve failing tests.
• Collaborates with FPGA architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
• May also collaborate with systems and software engineers to support integration testing of the FPGA.
• Documents test plans and drives technical reviews of plans and proofs with design and ar...