Design Engineer II

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

+ Development, automation and maintenance of EDA flows and scripts for physical implementation

+ Develop TFM to optimize PPA for IP’s and Soft Controllers

+ PPA characterization and optimization of flow for performance-oriented and power-oriented best-in-class IP cores in advanced process nodes, on TSMC, Intel, Samsung and Rapidus Foundries

+ Manage regression infrastructure that tracks quality of the RTL/flow development as well as the PPA of the key designs.

+ Digital design implementation using Cadence EDA tools - Genus, Innovus, Conformal, Litmus, Tempus, Voltus, Certus, Pegasus and other backend tools

+ Develop automation scripts using AI tools and reduce design execution turnaround time

+ Required skills –

+ Educational Qualification: MS/MTech/BE/ BTech in Electronics from reputed institutes with 2 ...