UVM Verification Engineer (Memory & Interconnect)

Design Verification Engineer - Senior / Lead / Sr. Lead

Location: Bangalore / Hyderabad

Experience: 4 to 10 Years

Required Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 4+ years of hands-on experience in design verification of high-speed interfaces such as DDR, PCIe, UCIe, or NVMe.
• Expertise in SystemVerilog and UVM (Universal Verification Methodology).
• Strong understanding of digital design principles, verification methodologies, and simulation tools.
• Familiarity with protocol specifications and industry standards for DDR, PCIe, UCIe, or NVMe.
• Experience with simulation tools like...