Vacancy Description
Hiring!
DV Design Verification
PCIe Logic Verification (8+ yrs)
End-to-end verification of PCIe controller/subsystem (Gen5/6/7).
Role:
Verify PCIe protocol
Debug RTL/testbench/system issues
Strong SystemVerilog & UVM
#PCIe #UVM #HighSpeedDesign #DesignVerification
#VerificationEngineer #PCIEVerification #VLSI #Semiconductors
DV Design Verification
PCIe Logic Verification (8+ yrs)
End-to-end verification of PCIe controller/subsystem (Gen5/6/7).
Role:
Verify PCIe protocol
Debug RTL/testbench/system issues
Strong SystemVerilog & UVM
#PCIe #UVM #HighSpeedDesign #DesignVerification
#VerificationEngineer #PCIEVerification #VLSI #Semiconductors
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