Senior FPGA HDL Design & Verification Engineer (Simulation)

Lattice Semiconductor in Bayan Lepas, Malaysia is looking for an experienced HDL design/verification engineer to enhance simulation capabilities within Lattice Radiant, the official FPGA design tool. You will support simulation workflows for Verilog, VHDL, and SystemVerilog while working closely with hardware developers and QA teams. The ideal candidate should have over 5 years of industrial experience, a degree in Electronics Engineering, and familiarity with EDA tool development. Competitive compensation and a collaborative team environment offered.
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