Semiconductor Physical Implementation Engineer

Hi All,

We are immediate hiring for Physical design Engineers for HYD Location.

Exp - 4 to 8 yrs

Location - Hyd

Notice Period - immediate

Mode on interview - F2F only in Hyd location.

JD:

• Tool : Cadence flow ( Innovus & Tempus )
• Node : 3 nm & 5nm
• Strong exp in block level : PD/PV & STA with EMIR knowledge
• Should be proficient in block level low power aware floor planning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities.

Interested candidates, kindly share with me your updated profile to [email protected] or call me 9900927620 for detailed discussion.