M

Safety Verification Methodology Engineer

MediaTek

Hsinchu City, Taiwan Province, Taiwan Full-time June 09, 2026
Apply Now

Vacancy Description

Job Description1.Develop fault simulation flow for function safety.
2.Deploy fault simulation for safety IPs
3.Co-work with IP design verification teams to achieve pre-silicon verification of hardware safety requirements

#LI-LL1
Requirement1.10+ years of engineering experience in IC design industry
2.5+ experience in design verification
3.Capability to collaborate with cross-organizations
4.Knowledge of ISO 26262, including the function safety aspects of design verification (preferred)
5.Experience in fault simulation (preferred)

Ready to Apply?

अभी आवेदन करें

Submit your application for Safety Verification Methodology Engineer at MediaTek

Apply for this Position