454860 jobs found
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ASIC Layout Engineer - Analog, High speed IP - 8 to 11 years - Bangalore
Cisco
Full-time
other-general
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ASIC Engineering Technical Leader | Design Verification | Verilog, System Verilog, UVM, Testbench | Exp- 12+ Years
Cisco
Full-time
other-general
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ASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |12-16 years| Pune)
Cisco
Full-time
other-general