Hardware Description Language Engineer

We’re Hiring: RTL Design Engineers (NoC )

📍 Location: Bangalore

🧑 💻 Experience: 8+ Years

🔹 Key Responsibilities:

- Integration of NoC IP into SoC design

- Develop and manage required interfaces for seamless connectivity

- Optimize NoC topology for latency, power, and area

- RTL generation and debugging of connectivity issues

- Work on Automotive SoC designs (ARM M-series based)

🔹 Required Skills:

- Strong experience in RTL Design (Verilog/SystemVerilog)

- Hands-on with NoC / Interconnect (Arteris preferred)

- Good understanding of SoC architecture & integration

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  - Experience with AXI / AHB protocols is a plus