FPGA Full-Chip Timing Engineer: Modeling & Integration

Altera is looking for a Full Chip Engineer in Penang, Malaysia. This role involves developing timing methodologies for advanced FPGA products and performing full-chip timing analysis.

The ideal candidate will hold a BS/MS in Electrical Engineering, have over 5 years of SoC development experience, and possess strong static timing analysis skills. Working with cross-functional teams is essential to success in this position.

Join Altera to be part of a dynamic design environment and influence the next generation of FPGA solutions.