Vacancy Description
Job Description1. CPU system design and performance analysis
2. System bus architecture and integration
3. IP and system verification
#LI-YT1
Requirement1. Experienced in CPU and DSP system design
2. HDL languages (such as Verilog or VHDL) and verification languages (such as SystemVerilog, UVM).
3. Experienced in SoC system design and silicon verification
2. System bus architecture and integration
3. IP and system verification
#LI-YT1
Requirement1. Experienced in CPU and DSP system design
2. HDL languages (such as Verilog or VHDL) and verification languages (such as SystemVerilog, UVM).
3. Experienced in SoC system design and silicon verification
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