ASIC RTL Verification Engineer - Front-End Logic

Altera in Penang is looking for a qualified candidate to develop verification plans ensuring design correctness in SoC integration. The role requires strong communication, leadership, and analytical skills, along with proficiency in RTL coding.

The ideal applicant should have a degree in Electronics Engineering and be familiar with logic simulation environments. Knowledge of scripting is a plus. This position is regular, based in Malaysia.