Vacancy Description
Job Description1. Architecture design and RTL implementation of AI subsystem
2. AI subsystem integration, design verification and peripheral design
3. AI subsystem performance and low-power analysis
#LI-YT1Requirement1. Familiar with digital IC design flow. FPGA is a plus
2. Familiar with SoC integration and design verification flow
3. Experienced in SoC architecture
4. Familiar with DSP/MCU, and bus (ARM bus) system architecture design.
5. Familiar with Perl, C, Verilog and power analysis related tools.
2. AI subsystem integration, design verification and peripheral design
3. AI subsystem performance and low-power analysis
#LI-YT1Requirement1. Familiar with digital IC design flow. FPGA is a plus
2. Familiar with SoC integration and design verification flow
3. Experienced in SoC architecture
4. Familiar with DSP/MCU, and bus (ARM bus) system architecture design.
5. Familiar with Perl, C, Verilog and power analysis related tools.
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